Masterclock D232 Scheda Tecnica

Intel® E8870 Scalable Node Controller (SNC) DatasheetProduct Features Intel® Itanium® 2 Processor System Bus— Itanium 2 processor system bus interfac

x Intel® E8870 Scalable Node Controller (SNC) Datasheet9-10 RAMBUS “CMOS 1.8 I/O” DC Parameters...

System Address Map4-4 Intel® E8870 Scalable Node Controller (SNC) DatasheetSome FWH components implement more than 4 MB of firmware space. These compo

Intel® E8870 Scalable Node Controller (SNC) Datasheet 4-5System Address MapNorth BIOS: Elements of system BIOS that reside in the FWH device(s) connec

System Address Map4-6 Intel® E8870 Scalable Node Controller (SNC) DatasheetFigure 4-3. Firmware Map Example using Intel® E8870 Chipset and Intel 82802

Intel® E8870 Scalable Node Controller (SNC) Datasheet 4-7System Address Map4.1.2.4 Chipset Specific RangeThe address range FE00_0000h - FFBF_FFFFh reg

System Address Map4-8 Intel® E8870 Scalable Node Controller (SNC) DatasheetInterface subrange is routed there. An SP request that falls in the MMIO ra

Intel® E8870 Scalable Node Controller (SNC) Datasheet 4-9System Address Mapmemory is generally global. Multiple processor bus systems use local memory

System Address Map4-10 Intel® E8870 Scalable Node Controller (SNC) Datasheet4.1.5.3.5 128-byte Interleave ExampleFigure 4-4 describes the 128-byte int

Intel® E8870 Scalable Node Controller (SNC) Datasheet 4-11System Address MapGlobal interleave range 2 extends from 10 to 12 GB. It consists of two 1-G

System Address Map4-12 Intel® E8870 Scalable Node Controller (SNC) DatasheetTo avoid memory scrubbing problems, reflection size must be 4 GB maximum.

Intel® E8870 Scalable Node Controller (SNC) Datasheet 4-13System Address Map4.2.1.3 SIOH Registers4.2.1.4 Routing by SP AttributeThe E8870 chipset rou

Intel® E8870 Scalable Node Controller (SNC) Datasheet 1-1Introduction 11.1 OverviewThe Intel® E8870 chipset delivers new levels of availability, featu

System Address Map4-14 Intel® E8870 Scalable Node Controller (SNC) DatasheetAny other encodings are treated as DND. That is, they are not used for rou

Intel® E8870 Scalable Node Controller (SNC) Datasheet 4-15System Address MapLow MMIO Above MMIOL.BASEb to FDFF_FFFFh.Issue non-coherent Read/Write to

System Address Map4-16 Intel® E8870 Scalable Node Controller (SNC) Datasheet4.2.2 Inbound Transactions to SIOHTable 4-7. Intel® E8870 Chipset SAPIC I

Intel® E8870 Scalable Node Controller (SNC) Datasheet 4-17System Address Map0B_0000h to 0B_7FFFh and (MDA_en = 0) and (VGA_port = none) DRAM DRAM Rout

System Address Map4-18 Intel® E8870 Scalable Node Controller (SNC) Datasheet4.2.3 Local/Remote Decoding for Requests to Main MemoryThe SNC treats all

Intel® E8870 Scalable Node Controller (SNC) Datasheet 4-19System Address Map4.3.2 Outbound I/O AccessThe E8870 chipset allows I/O addresses to be mapp

System Address Map4-20 Intel® E8870 Scalable Node Controller (SNC) Datasheetstarting at 53BCh includes 53BC-53BFh. Since A[9:0] = 3BFh for 53BFh, it s

Intel® E8870 Scalable Node Controller (SNC) Datasheet 4-21System Address MapThe E8870 chipset provides memory mapped configuration mechanisms. See Sec

System Address Map4-22 Intel® E8870 Scalable Node Controller (SNC) Datasheet

Intel® E8870 Scalable Node Controller (SNC) Datasheet 5-1Memory Subsystem 5The memory subsystem consists of:• Memory controller and data buffers• DDR-

Introduction1-2 Intel® E8870 Scalable Node Controller (SNC) DatasheetFigure 1-1. Typical Itanium® 2-Based Server Configuration001247SP(Scalability Po

Memory Subsystem5-2 Intel® E8870 Scalable Node Controller (SNC) Datasheet5.1.2 Reads5.1.2.1 Read DecodingThe request is decoded for interleave range,

Intel® E8870 Scalable Node Controller (SNC) Datasheet 5-3Memory Subsystem 5.1.3 Writes5.1.3.1 Write DecodingWrites are decoded for interleave range, t

Memory Subsystem5-4 Intel® E8870 Scalable Node Controller (SNC) DatasheetIf this bit is set, the SNC will accumulate writes before bursting them:• Whe

Intel® E8870 Scalable Node Controller (SNC) Datasheet 5-5Memory SubsystemThe operating system guarantees that only one of these addresses will be gene

Memory Subsystem5-6 Intel® E8870 Scalable Node Controller (SNC) DatasheetFigure 5-1. Error Correction Code Layout on Main Channels 0 and 1D114h2C9g1D1

Intel® E8870 Scalable Node Controller (SNC) Datasheet 5-7Memory SubsystemFigure 5-2. Error Correction Code Layout on Main Channels 2 and 3D186h2D173g1

Memory Subsystem5-8 Intel® E8870 Scalable Node Controller (SNC) DatasheetThe 18 main channel data bits cannot be evenly divided among the eight device

Intel® E8870 Scalable Node Controller (SNC) Datasheet 5-9Memory SubsystemAll addresses mapped by the MIR will be tested whether they fall in ranges ma

Memory Subsystem5-10 Intel® E8870 Scalable Node Controller (SNC) Datasheet5.3.1.2 Configuration for PerformanceFor best performance, the amount of mem

Intel® E8870 Scalable Node Controller (SNC) Datasheet 5-11Memory SubsystemThe DMH will compare read addresses to the posted writes and substitute queu

Intel® E8870 Scalable Node Controller (SNC) Datasheet 1-3Introduction1.3 Architectural OverviewFigure 1-2 is a conceptual depiction of the SNC’s queue

Memory Subsystem5-12 Intel® E8870 Scalable Node Controller (SNC) DatasheetThe minimum configuration is 512 MB: 1 DIMM (total of 128MB) device on each

Intel® E8870 Scalable Node Controller (SNC) Datasheet 5-13Memory Subsystemprovide the critical word in the early half of the main channel data packet.

Memory Subsystem5-14 Intel® E8870 Scalable Node Controller (SNC) DatasheetHigh-order FieldBits that are required to address a given technology (the nu

Intel® E8870 Scalable Node Controller (SNC) Datasheet 5-15Memory Subsystem5.3.4 DDR Maintenance OperationsThe maintenance operations that may occur ar

Memory Subsystem5-16 Intel® E8870 Scalable Node Controller (SNC) Datasheet

Intel® E8870 Scalable Node Controller (SNC) Datasheet 6-1Reliability, Availability, and Serviceability 6This section describes the features provided b

Reliability, Availability, and Serviceability6-2 Intel® E8870 Scalable Node Controller (SNC) DatasheetTable 6-1. Intel® E8870 Chipset ErrorsERR# Type

Intel® E8870 Scalable Node Controller (SNC) Datasheet 6-3Reliability, Availability, and ServiceabilityMemory (cont)M7 CorrCorrectable Memory ECC Error

Reliability, Availability, and Serviceability6-4 Intel® E8870 Scalable Node Controller (SNC) DatasheetSP Protocol Layer (cont)P8 Corr Illegal SP Addre

Intel® E8870 Scalable Node Controller (SNC) Datasheet 6-5Reliability, Availability, and Serviceability6.1.1 End-to-end Error CorrectionECC errors are

Introduction1-4 Intel® E8870 Scalable Node Controller (SNC) Datasheet1.4 InterfacesFigure 1-3 illustrates the SNC and all of its interfaces, which con

Reliability, Availability, and Serviceability6-6 Intel® E8870 Scalable Node Controller (SNC) Datasheet6.1.1.1 Exceptions•No checks will be done on FWH

Intel® E8870 Scalable Node Controller (SNC) Datasheet 6-7Reliability, Availability, and ServiceabilityFor reliable signaling of errors in the system,

Reliability, Availability, and Serviceability6-8 Intel® E8870 Scalable Node Controller (SNC) Datasheet• If MDFC is enabled, uncorrectable ECC errors o

Intel® E8870 Scalable Node Controller (SNC) Datasheet 6-9Reliability, Availability, and ServiceabilityAn entry times-out if the counter wraps around (

Reliability, Availability, and Serviceability6-10 Intel® E8870 Scalable Node Controller (SNC) Datasheet6.2.2 Server Management (SM)SM provides “out-of

Intel® E8870 Scalable Node Controller (SNC) Datasheet 6-11Reliability, Availability, and Serviceability6.2.5 SummaryTable 6-2 summarizes the different

Reliability, Availability, and Serviceability6-12 Intel® E8870 Scalable Node Controller (SNC) Datasheet• Failed PCI slots. Failed PCI slots is isolate

Intel® E8870 Scalable Node Controller (SNC) Datasheet 6-13Reliability, Availability, and Serviceability• The ability for system software to generate a

Reliability, Availability, and Serviceability6-14 Intel® E8870 Scalable Node Controller (SNC) Datasheet BusNum // Bus number on which component res

Intel® E8870 Scalable Node Controller (SNC) Datasheet 6-15Reliability, Availability, and ServiceabilityFor E8870 chipset components, the DevNum shown

Intel® E8870 Scalable Node Controller (SNC) Datasheet 1-5IntroductionA clock generator must be provided for each channel that is compliant with the Di

Reliability, Availability, and Serviceability6-16 Intel® E8870 Scalable Node Controller (SNC) DatasheetThese errors do not compromise further chipset

Intel® E8870 Scalable Node Controller (SNC) Datasheet 6-17Reliability, Availability, and Serviceability. Table 6-4. E8870 Chipset Errors, Transaction

Reliability, Availability, and Serviceability6-18 Intel® E8870 Scalable Node Controller (SNC) DatasheetSP Link LayerS1 FatalLink Error; Failed SP LLR

Intel® E8870 Scalable Node Controller (SNC) Datasheet 6-19Reliability, Availability, and ServiceabilityHub Interface (SIOH) H3 FatalIllegal Inbound Hu

Reliability, Availability, and Serviceability6-20 Intel® E8870 Scalable Node Controller (SNC) Datasheet6.5.4 ESP Error LogsThis section provides the f

Intel® E8870 Scalable Node Controller (SNC) Datasheet 6-21Reliability, Availability, and ServiceabilityFor SP link layer ECC errors, information is lo

Reliability, Availability, and Serviceability6-22 Intel® E8870 Scalable Node Controller (SNC) Datasheet

Intel® E8870 Scalable Node Controller (SNC) Datasheet 7-1Clocking 77.1 System ClockingIn systems employing the E8870 chipset, the phase of the clock r

Clocking7-2 Intel® E8870 Scalable Node Controller (SNC) DatasheetFigure 7-1. Clock Distribution SchemeDMHDMHMemory ConnectorDMCGCPU Node Connector 1C

Intel® E8870 Scalable Node Controller (SNC) Datasheet 7-3ClockingProcessor and chipset reference clock inputs are differential. Each chipset component

Introduction1-6 Intel® E8870 Scalable Node Controller (SNC) Datasheet1.4.6 SMBus Slave InterfaceThis port is controlled by an autonomous platform mana

Clocking7-4 Intel® E8870 Scalable Node Controller (SNC) DatasheetEach Clock Generator requires two phase difference signals from each RAC within the S

Intel® E8870 Scalable Node Controller (SNC) Datasheet 7-5Clocking7.8 JTAGThe external TCK is synchronized to the internal core clock for interfacing t

Clocking7-6 Intel® E8870 Scalable Node Controller (SNC) Datasheet

Intel® E8870 Scalable Node Controller (SNC) Datasheet 8-1System Reset 88.1 Reset TypesThe Intel E8870 chipset supports several reset types. Table 8-1

System Reset8-2 Intel® E8870 Scalable Node Controller (SNC) Datasheet8.2 Reset SequencesAll E8870 chipset reset sequences with the sub-sequences are s

Intel® E8870 Scalable Node Controller (SNC) Datasheet 8-3System Reset8.2.1 Power-up Reset SequenceThe following sections define the timing required of

System Reset8-4 Intel® E8870 Scalable Node Controller (SNC) Datasheet Table 8-3. Power-up and Hard Reset Deassertion TimingsDescription Min Max Comme

Intel® E8870 Scalable Node Controller (SNC) Datasheet 8-5System Reset8.2.1.1 PWRGOOD DeassertionWhile PWRGOOD is deasserted, the SNC asserts RESET# to

System Reset8-6 Intel® E8870 Scalable Node Controller (SNC) Datasheetrising edge makes setup and hold at each component, the counters will all have th

Intel® E8870 Scalable Node Controller (SNC) Datasheet 8-7System Reset8.2.2 Hard Reset8.2.2.1 Hard Reset Assertion Sequence•RESETI# assertions need onl

Intel® E8870 Scalable Node Controller (SNC) Datasheet 1-7IntroductionImplicit Write-Back (IWB) IWB is used to describe the hit-modified-snoop response

System Reset8-8 Intel® E8870 Scalable Node Controller (SNC) Datasheet8.2.2.2 Hard Reset Assertion that Does Not Preserve Memory nor ConfigurationAs th

Intel® E8870 Scalable Node Controller (SNC) Datasheet 8-9System ResetCLK66 and CLK33 references are reset only on the First Reset deassertion. After a

System Reset8-10 Intel® E8870 Scalable Node Controller (SNC) Datasheet• After Multi-cycle initialization is complete, If ((MC.MT indicated DDR before

Intel® E8870 Scalable Node Controller (SNC) Datasheet 8-11System ResetDDR-SDRAM refresh is not synchronized to the memory maintenance cycle. The DDR r

System Reset8-12 Intel® E8870 Scalable Node Controller (SNC) Datasheet8.2.2.8 Itanium® 2 Processor BINIT# ResetA BINIT# assertion on the Itanium 2 pro

Intel® E8870 Scalable Node Controller (SNC) Datasheet 8-13System Reset8.3.1 ICH4: PWROKThis pin causes the ICH4 to assert PCIRST#. It may be connected

System Reset8-14 Intel® E8870 Scalable Node Controller (SNC) Datasheet8.3.5 SNC and SIOH and SPS: RESETI#This pin is the hard reset input to the SNC,

Intel® E8870 Scalable Node Controller (SNC) Datasheet 8-15System Reset8.3.6 SIOH: RESET66#This pin is asserted combinationally while RESETI# is assert

System Reset8-16 Intel® E8870 Scalable Node Controller (SNC) Datasheet8.3.13 SNC: BNR#The SNC toggles BNR# to prevent requests from being initiated on

Intel® E8870 Scalable Node Controller (SNC) Datasheet 9-1Electrical Specifications 99.1 Non-operational Maximum RatingThe absolute maximum non-operati

Introduction1-8 Intel® E8870 Scalable Node Controller (SNC) Datasheet1.6 ReferencesThe reader of this specification should also be familiar with mater

Electrical Specifications9-2 Intel® E8870 Scalable Node Controller (SNC) Datasheet9.3 SNC System Bus Signal Group9.3.1 OverviewIn this section, the sy

Intel® E8870 Scalable Node Controller (SNC) Datasheet 9-3Electrical SpecificationsAGTL+ inputs use differential receivers which require a reference si

Electrical Specifications9-4 Intel® E8870 Scalable Node Controller (SNC) Datasheet9.3.3 DC SpecificationsThe DC specifications for all the system bus

Intel® E8870 Scalable Node Controller (SNC) Datasheet 9-5Electrical Specifications9.5 Main Channel Interface9.5.1 Main Channel Interface Reference Vol

Electrical Specifications9-6 Intel® E8870 Scalable Node Controller (SNC) Datasheet9.5.2 DC Specifications9.5.3 AC SpecificationsFor complete RAMBUS da

Intel® E8870 Scalable Node Controller (SNC) Datasheet 9-7Electrical Specifications9.6 LPC Signal GroupThe seven required and five supporting signals u

Electrical Specifications9-8 Intel® E8870 Scalable Node Controller (SNC) DatasheetFor specifications related to components or external tools that will

Intel® E8870 Scalable Node Controller (SNC) Datasheet 9-9Electrical Specifications9.7.2 AC SpecificationsFigure 9-1. TAP DC ThresholdsTable 9-16. SMBu

Electrical Specifications9-10 Intel® E8870 Scalable Node Controller (SNC) Datasheet9.7.3 AC Timing WaveformsThe following figures are used in conjunct

Intel® E8870 Scalable Node Controller (SNC) Datasheet 9-11Electrical Specifications9.8 Miscellaneous Signal PinsAll buffer types that do not belong to

Intel® E8870 Scalable Node Controller (SNC) Datasheet 2-1Signal Description 22.1 ConventionsThe terms assertion and deassertion are used extensively w

Electrical Specifications9-12 Intel® E8870 Scalable Node Controller (SNC) Datasheet9.8.2 DC CharacteristicsTable 9-20. CMOS 1.3V DC Parametersa,ba. Al

Intel® E8870 Scalable Node Controller (SNC) Datasheet 9-13Electrical Specifications9.8.3 AC SpecificationTable 9-23. CMOS 1.8V Output DC Parametersaa

Electrical Specifications9-14 Intel® E8870 Scalable Node Controller (SNC) Datasheet Table 9-27. CMOS 1.5V AC Parametersa,ba. Supply voltage at 1.5V

Intel® E8870 Scalable Node Controller (SNC) Datasheet 9-15Electrical Specifications9.9 Clock Signal Groups9.9.1 AC SpecificationSRf Output Slew Rate F

Electrical Specifications9-16 Intel® E8870 Scalable Node Controller (SNC) DatasheetFigure 9-4. Generic Differential Clock Waveform00061580%TriseTriseR

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-1Ballout and Package Information 1010.1 1357-ball OLGA2b Package InformationThe 1357-ball OLG

Ballout and Package Information10-2 Intel® E8870 Scalable Node Controller (SNC) DatasheetFigure 10-2. 1357-ball OLGA2b Package Dimensions – Bottom Vie

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-3Ballout and Package Information10.2 Ball-out Specifications10.2.1 Ball-out ListsTable 10-1 l

Ballout and Package Information10-4 Intel® E8870 Scalable Node Controller (SNC) DatasheetTable 10-1. SNC Ball ListBall Number Signal Ball Number Signa

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-5Ballout and Package InformationC9 A[13]# D11 A[3]#C10 VSS D12 VSSC11 A[10]# D13 VSSC12 VTTMK

ii Intel® E8870 Scalable Node Controller (SNC) Datasheet INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. EXCEPT AS PROV

Signal Description2-2 Intel® E8870 Scalable Node Controller (SNC) DatasheetSome signals or groups of signals have multiple versions. These signal grou

Ballout and Package Information10-6 Intel® E8870 Scalable Node Controller (SNC) DatasheetE13 VTTMK F15 D[63]#E14 VTTMK F16 VSSE15 D[31]# F17 D[58]#E16

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-7Ballout and Package InformationG17 STBN[3]# H19 D[52]#G18 VSS H20 VTTMKG19 D[56]# H21 DEP[5]

Ballout and Package Information10-8 Intel® E8870 Scalable Node Controller (SNC) DatasheetJ21 D[47]# K23 D[71]#J22 VSS K24 VSSJ23 D[43]# K25 D[67]#J24

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-9Ballout and Package InformationL25 STBP[4]# M27 D[73]#L26 VTTMK M28 VTTMKL27 N/C M29 VSSL28

Ballout and Package Information10-10 Intel® E8870 Scalable Node Controller (SNC) DatasheetN29 SP0BD[9] P31 VSSN30 VSS P32 SP0BSTBP[1]N31 SP0BLLC P33 V

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-11Ballout and Package InformationR33 SP0SYNC T35 VCCSPR34 VSS T36 SP0BD[3]R35 SP0BD[2] T37 VS

Ballout and Package Information10-12 Intel® E8870 Scalable Node Controller (SNC) DatasheetU37 SP0BVREFH[1] W2 R0DQA[2]V1 R0DQA[5] W3 VSSV2 VCCRIO W4 R

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-13Ballout and Package InformationY4 VSS AA6 R1DQA[0]Y5 R1DQA[1] AA7 VSSY6 VSS AA8 VCCRIOY7 R1

Ballout and Package Information10-14 Intel® E8870 Scalable Node Controller (SNC) DatasheetAB8 VSS AC10 NODEID[0]AB9 TDO AC11 INT_OUT#AB10 NODEID[1] AC

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-15Ballout and Package InformationAD12 EV[1]# AE14 VCCAD13 RACODTEN[0] AE15 VSSAD14 VSS AE16 V

Intel® E8870 Scalable Node Controller (SNC) Datasheet 2-3Signal DescriptionMain Channels 0, 1, 2, 3 (continued)R{0/1/2/3}EXCC ORSL800 MHzColumn Expans

Ballout and Package Information10-16 Intel® E8870 Scalable Node Controller (SNC) DatasheetAF16 N/C AG18 VSSAF17 VSS AG19 LAD[3]AF18 N/C AG20 VCC3.3LPC

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-17Ballout and Package InformationAH20 LFRAME# AJ22 LCLKAH21 LPCCLKOUT1 AJ23 N/CAH22 VSS AJ24

Ballout and Package Information10-18 Intel® E8870 Scalable Node Controller (SNC) DatasheetAK24 R3DQB[4] AL26 VSSAK25 VSS AL27 R3CMDAK26 R3DQB[8] AL28

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-19Ballout and Package InformationAM28 R3SCK AN30 VSSAM29 VSS AN31 SP1BRSVDAM30 SP1BSTBN[1] AN

Ballout and Package Information10-20 Intel® E8870 Scalable Node Controller (SNC) DatasheetAP32 SP1BD[11] AR34 VSSAP33 VCCSP AR35 SP1BD[4]AP34 SP1BVREF

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-21Ballout and Package InformationAU3 VSSAU4 VSSAU5 R0SYNCLKNAU6 VSSAU7 R1SYNCLKNAU8 VSSAU9 VS

Ballout and Package Information10-22 Intel® E8870 Scalable Node Controller (SNC) DatasheetTable 10-2. SNC Signal-Ball NumberSignal Ball Number Signal

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-23Ballout and Package InformationDEP[10]# N14 D[120]# U16DEP[11]# M14 D[121]# V15DEP[12]# R21

Ballout and Package Information10-24 Intel® E8870 Scalable Node Controller (SNC) DatasheetD[41]# G23 D[77]# N22D[42]# E22 D[78]# L21D[43]# J23 D[79]#

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-25Ballout and Package InformationN/C AJ28 N/C L33N/C AH28 N/C AJ33HITM# H7 N/C K32HIT# G7 N/C

Signal Description2-4 Intel® E8870 Scalable Node Controller (SNC) DatasheetScalability Port 0, 1 (continued)SP{0/1}ASTBN[1:0]I/OSBD400 MHzN StrobesNeg

Ballout and Package Information10-26 Intel® E8870 Scalable Node Controller (SNC) DatasheetR0DQA[5] V1 R1DQA[5] V5R0DQA[6] V3 R1DQA[6] V7R0DQA[7] U2 R1

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-27Ballout and Package InformationR2DQA[5] AU11 R3DQA[5] AN11R2DQA[6] AR11 R3DQA[6] AL11R2DQA[

Ballout and Package Information10-28 Intel® E8870 Scalable Node Controller (SNC) DatasheetREQ[5]# J5 SP0ASTBP[0] G33RESETI# AJ25 SP0ASTBP[1] G29RESET#

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-29Ballout and Package InformationSP0BVREFH[2] M30 SP1AVREFH[0] AG37SP0BVREFH[3] U31 SP1AVREFH

Ballout and Package Information10-30 Intel® E8870 Scalable Node Controller (SNC) DatasheetSP1BVREFL[0] AK36 STBP[6]# T25SP1BVREFL[1] AP34 STBP[7]# U18

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-31Ballout and Package InformationVCC AE14 VCCRAaAD6VCC AE16 VCCRAa AL16VCC AE18 VCCRAa AM17VC

Ballout and Package Information10-32 Intel® E8870 Scalable Node Controller (SNC) DatasheetVCCSP AM31 VSS AA3VCCSP AM35 VSS AA5VCCSP AP29 VSS AA7VCCSP

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-33Ballout and Package InformationVSS AD4 VSS AG5VSS AD8 VSS AG7VSS AD10 VSS AG10VSS AD14 VSS

Ballout and Package Information10-34 Intel® E8870 Scalable Node Controller (SNC) DatasheetVSS AK25 VSS AN12VSS AK27 VSS AN14VSS AK31 VSS AN16VSS AK35

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-35Ballout and Package InformationVSS AR32 VSS B5VSS AR34 VSS B11VSS AR36 VSS B13VSS AR37 VSS

Intel® E8870 Scalable Node Controller (SNC) Datasheet 2-5Signal DescriptionScalability Port 0, 1 (continued)SP{0/1}GPIO[1:0]I/OCMOS1.5 ODN/AScalabilit

Ballout and Package Information10-36 Intel® E8870 Scalable Node Controller (SNC) DatasheetVSS E20 VSS H33VSS E26 VSS H37VSS E28 VSS J1VSS E30 VSS J2VS

Intel® E8870 Scalable Node Controller (SNC) Datasheet 10-37Ballout and Package InformationVSS M19 VSS R30VSS M25 VSS R32VSS M29 VSS R34VSS M33 VSS R36

Ballout and Package Information10-38 Intel® E8870 Scalable Node Controller (SNC) DatasheetVSS W15 VTTMK N27VSS W17 VTTMK D2VSS W19 VTTMK D9VSS W21 VTT

Intel® E8870 Scalable Node Controller (SNC) Datasheet 11-1Testability 11The SNC implements the Test Access Port (TAP) logic for testability purpose. T

Testability11-2 Intel® E8870 Scalable Node Controller (SNC) DatasheetA simplified block diagram of the TAP used in the this chipset components is show

Intel® E8870 Scalable Node Controller (SNC) Datasheet 11-3Testability• Capture-IR: In this state, the shift register contained in the Instruction Regi

Testability11-4 Intel® E8870 Scalable Node Controller (SNC) Datasheet• Select-DR-Scan: This is a temporary controller state and all test data register

Intel® E8870 Scalable Node Controller (SNC) Datasheet 11-5Testability11.3 Private TAP Instructions Table 11-3 contains descriptions of the encoding an

Testability11-6 Intel® E8870 Scalable Node Controller (SNC) DatasheetTDI and TDO. The bypass register is selected when no test operation is being perf

Intel® E8870 Scalable Node Controller (SNC) Datasheet 11-7Testability7:4 RW 0hStatus: [7]: Error bit set when a config request returns a Hard Fail con

Signal Description2-6 Intel® E8870 Scalable Node Controller (SNC) DatasheetPerformance, Debug, and Error Signals (continued)BUSID[2:0] /DBG[7:5]#I/OCM

Testability11-8 Intel® E8870 Scalable Node Controller (SNC) Datasheet

Intel® E8870 Scalable Node Controller (SNC) Datasheet 2-7Signal DescriptionClockingBUSCLKIDifferential200 MHzBus ClockThis is one of the two different

Signal Description2-8 Intel® E8870 Scalable Node Controller (SNC) DatasheetReset (continued)MEMRST0#OCMOS1.8N/AMemory Subsystem ResetThis signal is as

Intel® E8870 Scalable Node Controller (SNC) Datasheet 2-9Signal DescriptionItanium® 2 Processor BusA[43:3]#I/OAGTL+200 MHzAddress SignalsProcessor Add

Signal Description2-10 Intel® E8870 Scalable Node Controller (SNC) DatasheetItanium® 2 Processor Bus (continued)DEP[15:0]#I/OAGTL+400 MHzData Bus ECCE

Intel® E8870 Scalable Node Controller (SNC) Datasheet 2-11Signal DescriptionItanium® 2 Processor Bus (continued)STBN[7:0]#I/OAGTL+200 MHzData StrobesU

Intel® E8870 Scalable Node Controller (SNC) DatasheetiiiContents1 Introduction...

Signal Description2-12 Intel® E8870 Scalable Node Controller (SNC) Datasheet

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-1Configuration Registers 33.1 Access MechanismsThe SNC configuration registers can be accessed

Configuration Registers3-2 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.2.1 SPADA: Scratch Pad AliasThis is a memory mapped alias of the reg

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-3Configuration Registers3.2.6 CBCA3: Chip Boot Configuration AliasThis register may be read or

Configuration Registers3-4 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.3.2 CFGDAT: Configuration Data RegisterCFGDAT provides data for the

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-5Configuration Registers3.5.2 DID: Device Identification RegisterThis register combined with t

Configuration Registers3-6 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.5.4 RID: Revision Identification RegisterThis register contains the

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-7Configuration Registers3.5.7 SID: Subsystem IdentityThis register identifies the system. 3.6

Configuration Registers3-8 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.6.2 ASE: Address Space Enable RegisterThis register defines the Vide

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-9Configuration RegistersProcessor requests to this space are directed to a particular SP port

iv Intel® E8870 Scalable Node Controller (SNC) Datasheet3.6.8 SMRAM: SMM RAM Control Register...3-113.6

Configuration Registers3-10 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.6.5 AGP1: Advanced Graphics Port Sub-Range 1 RegisterIn general, tr

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-11Configuration Registers3.6.7 IORD: I/O Redirection RegisterThis register is used to redirect

Configuration Registers3-12 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.6.9 MIR[9:0]: Memory Interleave Range RegistersThese registers defi

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-13Configuration Registers3.7 Memory Controller Registers3.7.1 MC: Memory Control Settings3:0 R

Configuration Registers3-14 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.7.2 MIT[9:0]: Memory Interleave Technology RegistersThese registers

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-15Configuration Registers13:11 RW 0RAFIXThis field defines which portion of the DIMM is mapped

Configuration Registers3-16 Intel® E8870 Scalable Node Controller (SNC) DatasheetA MIT may not describe more than one DIMM. Multiple MITs can apply to

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-17Configuration Registers17:16 RW 1hTWR: Write to Read DelayThe minimum delay from the Write c

Configuration Registers3-18 Intel® E8870 Scalable Node Controller (SNC) DatasheetTable 3-5 defines the legal combinations for TRW, TWR as a function o

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-19Configuration RegistersA value of 0 indicates that refreshes should not be generated. For mo

Intel® E8870 Scalable Node Controller (SNC) Datasheetv3.10.11 FSBPMEU[1:0]: Processor Bus Perform Monitor Utilization Events...

Configuration Registers3-20 Intel® E8870 Scalable Node Controller (SNC) Datasheet28:26 RV 0 Reserved25 RW 0IIO: Initiate Initialization Operation When

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-21Configuration Registers3.7.7 MTS: Memory Test and Scrub RegisterThis register is used to con

Configuration Registers3-22 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.7.8 XTPR[7:0]: External Task Priority RegisterThese registers defin

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-23Configuration Registers3.8 Reset, Boot and Control Registers3.8.1 SYRE: System ResetThis reg

Configuration Registers3-24 Intel® E8870 Scalable Node Controller (SNC) DatasheetThis register is sticky through reset; that is, the contents of the r

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-25Configuration Registers3.8.3 CVCR: Configuration Values Captured on ResetThis register holds

Configuration Registers3-26 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.8.4 SPAD: Scratch PadThis register provides 32 bits of storage for

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-27Configuration Registers3.8.6 BOFL: Boot FlagThis register is used to select boot strap CPU.

Configuration Registers3-28 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.8.8 SPC: Scalability Port Control RegisterThis register controls th

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-29Configuration Registers3.8.9 FSBC: Processor Bus Control Register3.8.10 FWHSEL: FWH Device S

vi Intel® E8870 Scalable Node Controller (SNC) Datasheet6 Reliability, Availability, and Serviceability...

Configuration Registers3-30 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.8.11 SNCINCO: SNC Interface ControlThis register controls all the p

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-31Configuration Registers3.8.12 SP0INCO, SP1INCO: SP Interface ControlThese registers are comm

Configuration Registers3-32 Intel® E8870 Scalable Node Controller (SNC) Datasheet18:16 RWS 101Response CreditsCredits supported by this SP port on the

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-33Configuration Registers3.9 Error Registers3.9.1 ERRCOM: Error CommandThis register enables e

Configuration Registers3-34 Intel® E8870 Scalable Node Controller (SNC) DatasheetDevice: NodeIDFunction: 2Offset: 80h(31:0), 84h(63:32), 88h(96:64)Bit

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-35Configuration RegistersProcessor Bus Errors (Continued)85 RCS 0 UncF8:BERR# Observed Set whe

Configuration Registers3-36 Intel® E8870 Scalable Node Controller (SNC) DatasheetMemory Errors (Continued)37 RCS 0 UncM3: Uncorrectable Memory ECC Err

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-37Configuration RegistersScalability Port Physical Layer Errors (Continued)19 RCS 0 UncS2: SP

Configuration Registers3-38 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.9.3 SERRST: Second Error StatusThis register is used to report subs

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-39Configuration Registers3.9.5 RECFSB: Recoverable Error Control Information of Processor BusT

Intel® E8870 Scalable Node Controller (SNC) Datasheetvii8.3.7 P64H2: RSTIN#...

Configuration Registers3-40 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.9.6 NRECFSB: Non-recoverable Error Control Information of Processor

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-41Configuration Registers3.9.7 RECSPP: Recoverable Error Control Information of SPP This regis

Configuration Registers3-42 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.9.10 REDSPL[1:0]: SP Non-fatal Error Data LogThis register latches

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-43Configuration Registers3.9.12 RECMEM: Recoverable Error Control Information of MemoryThis re

Configuration Registers3-44 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.10 Performance Monitoring Registers3.10.1 PERFCON: Performance Moni

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-45Configuration RegistersDevice: NodeIDFunction: 3Offset: 50h Bit Attr Default Description15:1

Configuration Registers3-46 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.10.2 PTCTL: Timer ControlThe countdown timer can be used to control

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-47Configuration Registers10:8 RW 0Timer PrescaleThis field determines the rate at which the ti

Configuration Registers3-48 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.10.3 PMINIT: Timer Initial Value RegisterThe contents of this regis

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-49Configuration RegistersNote: For these first two methods, bit 31 of the PMC should typically

viii Intel® E8870 Scalable Node Controller (SNC) DatasheetFigures1-1 Typical Itanium® 2-Based Server Configuration...

Configuration Registers3-50 Intel® E8870 Scalable Node Controller (SNC) Datasheet23:22 RW 0Compare ModeThis field defines how the PMC (compare) regist

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-51Configuration Registers15:14 RW 0Count Mode00 - Count event selected by Count Event Select f

Configuration Registers3-52 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.10.8 FSBPMEL[1:0]: Processor Bus Performance Monitor Events LOThis

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-53Configuration Registers3.10.9 FSBPMEH[1:0]: Processor Bus Performance Monitor Events HIThis

Configuration Registers3-54 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.10.10 FSBPMER[1:0]: Processor Bus Performance Monitor Resource Even

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-55Configuration Registers3.10.11 FSBPMEU[1:0]: Processor Bus Perform Monitor Utilization Event

Configuration Registers3-56 Intel® E8870 Scalable Node Controller (SNC) Datasheet19:13 RW 0Threshold ComparisonValue compared against number of entrie

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-57Configuration Registers3.10.12 SPPMD[1:0]: SP Performance Monitor Data This is the performan

Configuration Registers3-58 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.10.14 SPPMR[1:0]: SP Performance Monitor Response The PMR register

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-59Configuration Registers18:16 RW 0Count Event SelectThis field determines the counter enable

Intel® E8870 Scalable Node Controller (SNC) DatasheetixTables1-1 Chipset Component Markings...

Configuration Registers3-60 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.10.15 SPPME[1:0]: SP Performance Monitor Events The SP performance

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-61Configuration Registers3.10.16 HPPMR: Hot Page Control and ResponseThe PMR register controls

Configuration Registers3-62 Intel® E8870 Scalable Node Controller (SNC) Datasheet17:15 RW 0ResolutionDetermines the address range for each counter000

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-63Configuration Registers3.10.17 HPADDR: Hot Page IndexThis register is used in conjunction wi

Configuration Registers3-64 Intel® E8870 Scalable Node Controller (SNC) Datasheet3.10.20 HPBASE: Hot Page Range BaseThis register contains the base ad

Intel® E8870 Scalable Node Controller (SNC) Datasheet 3-65Configuration Registers3.10.22 HPRCTR: Hot Page Range CounterThis register contains the valu

Configuration Registers3-66 Intel® E8870 Scalable Node Controller (SNC) Datasheet

Intel® E8870 Scalable Node Controller (SNC) Datasheet 4-1System Address Map 44.1 Memory MapThe Itanium 2 processor provides address bits for a 50-bit

System Address Map4-2 Intel® E8870 Scalable Node Controller (SNC) Datasheet4.1.1 Compatibility RegionThis is the range from 0 to 1 MB (0_0000h to F_FF

Intel® E8870 Scalable Node Controller (SNC) Datasheet 4-3System Address MapThe default for these segments at power-on is that they are mapped read/wri